Hi . I have received one offer from Microsoft for L62
Base :45
Rsu :90k for 4 years
Jb :10 lakhs over 2 years

Is that good or low ball

Holding offer :
Base :42
Rsu :60k for 4 years
Joining bonus :8

Student project. Parat takes a multiplier as an AIGER file and either proves out == a × b for ALL inputs, or gives a counterexample (a, b, wrong output, right output).

- 27 of the 28 unsigned GenMul architectures at 64 bits (array/Wallace/Dadda/counter trees with Kogge-Stone, Brent-Kung, carry-skip, ... adders), mostly under 1 s, each with a certificate that an independent checker (pacheck2) verifies. AMulet2 gets 8 of 28 in 300 s on the same files.

- Signed (two's complement) multipliers too: 26 of 27, detected automatically.

- Finds counterexamples for hidden single-gate bugs that random simulation misses (6 of 8 test designs).

Repo with all benchmarks, scripts and raw results: https://github.com/himanshu161106-crypto/parat

Limits: AIGER input (Verilog via yosys works), one Wallace + carry-lookahead design not proved, large certificates.

I'd love to hear what multiplier / datapath circuits you verify in real work, and what format they're in.

Yeah, I know the odds of me landing an analog job after graduating with just a BS are like 0.1%. Regardless I want to ask, what are the best things I can do to stay on the right track and still try for it? Worst case scenario I go deeper into something I already like, and I join the club later down the line and get the MS. Coursework-wise I think I get the idea, all the analog electronics I can get my hands on, semiconductor devices, analog VLSI. But what about hands-on stuff I can do to build intuition toward analog IC design? Open PDKs, get familiar with ngspice/xschem? Should I bother with TinyTapeout?

Amd has come to for on campus placement drive, 10 to 12 month intern. It is taking:

2 technical rounds

1 hiring manager round

1 HR round

If anyone has gone through the process before, please give guidance on this. What to prepare, what type of questions asked, and anything else.

I just want insights on how the interview at Broadcom looks like. I have prepared typical topics needed for Physical Design but just want to know what type of questions do they normally ask. And what is the difficulty level from manager screening rounds to panel rounds.
Any information will be really helpful.
Thanks!

Hi everyone,

I'm a SoC Design Verification Engineer from South Korea, currently exploring job opportunities at semiconductor companies in Canada, such as AMD, NVIDIA, Qualcomm, and Amazon.

Here's a brief overview of my background:

• Master's degree in Electrical Engineering
• 3+ years of professional experience at a fabless semiconductor company
• SoC and IP-level Design Verification using SystemVerilog and UVM
• Experience with LPDDR5X memory subsystems and UCIe chiplet interconnects
• Functional verification, coverage closure, and performance bottleneck analysis
• Experience with one SoC tape-out

I'm currently in South Korea and have applied for Canada's IEC Working Holiday program, but my application hasn't been approved yet.

My plan is to use the IEC open work permit to pursue engineering opportunities in Canada without requiring employer sponsorship initially.

However, I'm aware that the work permit is temporary (up to 2 years), and I'm not sure how major semiconductor companies view candidates in this situation.

I've already started applying to some positions from Korea, but haven't had much luck so far.

I'd love to hear your thoughts:

1. Does this sound like a realistic strategy, or am I being too optimistic?
2. Would my background be competitive for Design Verification roles at major semiconductor companies in Canada?
3. Would a 2-year open work permit be a concern for recruiters or hiring managers, even if no initial sponsorship is required?
4. Should I keep applying from Korea, or would it make more sense to wait until my IEC is approved or I'm physically in Canada?

I'm not expecting an easy path, but I'd like to know whether this is a reasonable approach before investing more time and effort.

Any honest feedback, especially from engineers or recruiters in the Canadian semiconductor industry, would be greatly appreciated.

Thanks!

Anyone heard back?

A few months back I asked you guys for your worst 24 hour ASIC design ideas and you guys suggested counting until the heat death of the universe.

Thus, I build out an ethernet connected beacon that broadcasts an ethernet frame over 100Mbps ethernet with the current uptime, and the ability to do so without overflow for the next 10^100 years.

Shortly after taping out the beacon with Tiny Tapeout, I got the opportunity to do a sponsored tapeout with wafer.space (very grateful to them) and with only 4 days to pull it off I decided that adding the beacon onto the chip was an awesome idea ...

So the beacon is getting its own chip 🥳 !

Fast forward October and the first 6 wafers have gotten back from the fab and the guys at wafer.space shared some really cool die shots.

As promised I will keep you guys updated with bring-up.

Original worst ASIC ideas thread: https://www.reddit.com/r/chipdesign/comments/1uk54wj/my_brain_is_fried_give_me_your_worst_48_hours/

Tapeout number 1 of the beacon (the full chip is tapeout number 2): https://www.reddit.com/r/chipdesign/comments/1unkvvz/reddit_designed_asic/

Credit to u/thegreatpotatogod for this terrible idea!

Both this post and the chip were created without any AI.

​

Hey everyone!

I have to choose one of the following projects for a 5-week Digital VLSI Circuits course, and I wanted to get some opinions on which would be the most worthwhile to pursue.

The four options are:

1. Transient Supply Droop Detector

2. Digital Frequency Multiplier

3. Process Variation Sensor

4. Time-to-Digital Converter (TDC)

The project will be implemented in Cadence Virtuoso, with transistor-level circuit design, simulation, layout, DRC/LVS verification, and post-layout parasitic extraction.

I'm looking for something that would look good on my resume, have practical industry relevance, and still be interesting enough to stand out. Ideally, I don't want to pick something that's too niche, but I also don't want to do a project that feels overly common or generic.

Since the timeline is only five weeks, I also want to choose something that is challenging enough to learn from without becoming unmanageable.

For those with experience in the semiconductor industry, VLSI design, or similar projects:

- Which of these would be most valuable from a hiring manager's perspective?

- Which has the best balance of industry relevance, learning opportunities, and feasibility within five weeks?

- Which would allow me to demonstrate meaningful circuit-level design and optimization rather than just reproduce an existing design?

- Are any of these particularly relevant to current industry work in digital IC design, timing, or power management?

I'd appreciate any suggestions, especially from people who have worked with these kinds of circuits in Virtuoso or have experience with digital VLSI interviews.

Thanks!

I have found these in linkidin and got the mail to join it with the 50% off. Is this is a genuine platform or anything else🤷.

Has anyone found a way to automate the process of cleaning shorts in LVS? Any suggestions or ideas would be appreciated!

Italy was one of the first countries to implement the new EU directive that makes companies having to reveal a salary range for the positions they post.

I am baffled by how low these companies put their wages.

Less than 5 YoE? Expect a salary in the 30k to 39k range. Want 50k or more? Only with 7+ years.

And this is not for small villages in the middle of nowhere, it is in cities like Milan where the cost of living is crazy expensive. Moreover, if the company has offices in multiple locations they don't adjust their compensation to reflect the cost of living differences. It is a fucking joke, it is like they are lowballing as much as they can to see who accepts it.

I have been trying to change jobs but honestly feel more and more discouraged to apply to Italy, and it also makes me angry how people can accept such low conditions. Please remember that by accepting such a low wage you are not doing a favour to anyone but these greedy companies. It worsens the market for everyone.

Hi yall, I have an interview at Samsung for Semiconductor Engineering Internship.

Anyone have experience with interviews at Samsung for similar roles and know how the interview questions might look like? Thanks

Hey everyone, I’m more of an FPGA guy than an ASIC guy.

We’re building openTPU, an open-source AI accelerator with the whole stack in one repo: architecture, RTL, ISA, simulator, compiler, and host tools. It already runs some pretty respectable models like Qwen3.5 on a Kintex-7 PCIe card.

With help from the community, we’ve now routed our first design using Nangate45. I’d love to get some ASIC eyes on it, especially on the floorplan, timing constraints, and anything we might be overlooking as we move from FPGA to ASIC.

Feedback, contributions, and a good technical roast are all welcome. If you love this stuff, come have fun with us.

https://github.com/FeSens/openTPU

Hello everyone,

I’m a PI Engineer 1 at a major company in Vietnam with deep experience in RTL, STA, synthesis, and full-chip flow. I also have some hands-on experience using HSPICE to simulate and characterize CMOS analog blocks (amplifiers, LDOs, current references, etc.).

I’m very interested in switching to Analog IC Design (especially RF, mmWave, or biomedical applications) and am currently preparing Master’s applications at top research groups in Taiwan (NTU, NTHU, NCKU, NCTU, etc.). I would really appreciate any insights or advice from people who have experience in these programs.

Here are my main questions:

1. Do any of these labs accept and train new Master’s students who have no prior analog background (only digital design or CMOS simulation experience)?
2. If accepted, how long does it typically take for students to be fully trained and start contributing real work (e.g., designing analog blocks and participating in tape-out projects)?

Additionally, is it realistic after 2 years in a Master’s program to complete:

• Tape-out of 1 analog chip (single block or small IP)
• Publication of 1–2 papers in international conferences

I got an interview with a PMIC team with a focus on PMIC control architecture. How should I prep for this? Any specific aspects I should focus on?

Hi everyone,
I’ve completed all 4 interview rounds for a Google India Verification Engineer role, with positive feedback. HR then asked for some additional information, and it’s been around a week.

HR now says “the team is reviewing my feedback and will make a final decision regarding my level and next steps. They also clarified that the decision depends solely on my candidacy, not other candidates.”

Has anyone experienced this? What does this stage mean, and how long did it take to get the final decision?

Not sure if this belongs here as I posted on r/ece

Hey everyone! So I am planning on heading into my Accelerated Bachelors Master program. I won't start until Fall 2027 and I've been told it would reduce my time significantly at my university even if I pursue a PhD. So what I want to do is design the hardware what I am looking into and actually am good at is Digital Circuit design in VLSI, ASIC/FPGA, CMOS, and possibly Computer Arch if I can fit it in, I highly doubt I can. Point is I am already an undergrad researcher and in a fellowship. I am actually not doing research in my field but it is consider a material that translate to EE. I do not want to go into my masters and take classes that I may dislike. So far I like what I am learning but I want to make sure this is where I want to be.

What is the day to day life like?

Will I have time for my family and friends? How about hobbies?

How will I know if this is for me without getting exposure or do I actually need exposure?

I do not want to regret my decision. How did you know this was the right career path for you?

If given the stipend to continue research and pursue a masters or PhD which should I aim for?

Are there any project I can do currently?

Lastly, of course how is the salary in today's economy and is employability high for this type of work?

Hello,

I was recently in an interview wherein I was asked simple questions about poles and zeros in a single transistor circuit, and bode plots and two stage op amp design. I know these topics, but as soon as a new question comes up, I mess it up. Where can I get practice questions to help me prepare better ? I have solved Razavi’s exercises, but I can’t apply myself on the interview. Are there any other helpful materials?Any suggestions are welcome.

Thanks !

need to study and observe what happens in each pnr stage

Hi everyone, I can refer candidates for the open roles listed in the image. DM me if you match the requirements.

Roles:

Electronics Hardware Engineer (2-5 yrs, Bengaluru)

Hardware Architect Electronics (2-5 yrs, Coimbatore)

FPGA Design Engineer (10-12 yrs, Bengaluru)

Electronics & Semiconductor Engineer (4-15 yrs, Bengaluru)

PSP Firmware Engineer (5-9 yrs, Bengaluru)

ABL Firmware Engineer (5-9 yrs, Bengaluru)

WDD Engineer, Windows Device Driver (5-9 yrs, Bengaluru)

LDD Engineer, Linux Device Driver (6-10 yrs, Bengaluru)

HIL Test Automation (2-4 yrs, Pune)

Senior System Verification Engineer (9-12 yrs, Pune)

If you meet the requirements, DM me with your resume and a short summary of your experience, and I'll refer you.

Hi, I’m an MS(Research) student in the mixed-signal domain, currently on a long leave from clg.

Before my masters, I worked for around a year as a Verif Engineer, mainly building block-level IP testbenches using Python/cocotb.

Since Sept, I’ve started building an 8-bit processor from scratch (not RISC-V) with a custom ISA. I’m also trying to strengthen my verification skills by working on bus protocol verification, moving from cocotb towards pyUVM.

On the analog side, I’ve been watching lectures from different channels and curated a roadmap covering topics from analog circuits to analog IC design. I’m also solving problems from books/workbooks wherever I can find them, but I haven’t done any hands-on circuit design or SPICE simulations yet.

Digital seems interesting to me, but I’m not sure whether I’m leaning towards it simply because I have more experience with it and haven’t explored practical analog design yet.

Given my situation, does it make sense to continue in mixed-signal and explore analog design properly before deciding, or should I focus more on digital design?

Also, how would you suggest getting started with hands-on analog design?